Symbolic Encoding

The questions below are due on Sunday November 01, 2026; 11:59:00 PM.
 
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RISC-V Instruction Encoding with Symbolic Registers

The following questions ask you to provide the 32-bit binary encoding of different RISC-V instructions. You will need to use the RISC-V ISA handout for reference. For clarity, please separate each field of the instruction with an underscore in your answer (e.g., 11111_00000).

What is the 32-bit binary encoding of the instruction jal ra, label where label is 10 instructions after the current instruction? 0b

What is the 32-bit binary encoding of the instruction lw s1, 4(sp)? 0b

What is the 32-bit binary encoding of the instruction beq a2, t6, label where label is 7 instructions after the current instruction? 0b

What is the 32-bit binary encoding of the instruction sw t3, 8(a0)? 0b

What instruction does the 32-bit binary value 0b0000000_00101_01010_101_01000_0110011 encode (using symbolic registers)?

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